PCIe / PCI Express: Bandwidth

In our last post, we learned what PCIe / PCI Express is, a high speed serial bus found on newer computers, including the Raspberry Pi 5. Here we discuss how a PCIe bus connection can be extended or expanded from one to multiple slots.

Each computer, via a root complex, can handle a certain number of PCIe lanes. Lanes are serial connections using differential pairs for send & receive. The thing to remember is the number of lanes to the CPU is fixed. And each of those lanes has a certain bandwidth of data. The amount of data one lane can deliver depends on the PCIe version, per Wikipedia in the table below:

This should be used to figure out the maximum data transfer for the number of lanes you have. For an AMD Threadripper Pro, it supports a whopping 128 lanes of PCIe 4.0 (2048 GT/s, 250GB/s). With the upcoming Raspberry Pi 5, it has one lane of PCIe 2.0 per their website (5 GT/s, 0.5 GB/s). Keep this in mind as far as connection speeds.

How much data can be transferred is important for the next post as far as extending and expanding PCIe.

Next is how to mix and match PCIe devices and extend connectors.

Previous: PCIe / PCI Express: what it is and terminology

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• Source: https://blog.adafruit.com/2023/10/04/pcie-pci-express-bandwidth/